ER59256 256- bit EEPROM 16 x 16 bit Seral Electrically Erasable and Programmable ROM N-Channel SNOS technology Pins: 1 : CS 2 : CLK 3 : D input 4 : D output 5 : Gnd 6 : n.c. 7 : n.c. 8 : Vcc = + 5 V Instruction Set: shifted Input datas Instructions and Startbit OpCode Address Data Comments 1 0100 A3A2A1A0 READ Register A3A2A1A0 1 0100 A3A2A1A0 D15...D0 WRITE Register A3A2A1A0 1 1100 A3A2A1A0 ERASE Register A3A2A1A0 1 0011 0000 ERASE/WRITE ENABLE 1 0000 0000 ERASE/WRITE DISABLE 1 0010 0000 ERASE ALL REGISTERS There is no Endbit. The end of an instruction is made by CS going to low. For the READ the CS is left high until the 16 bits are shifted out. A dummy bit (logical 0, low) precedes the D15...D0 data word. The output data changes during the high state of the system clock. _________________________________
Without guaranty! Mistakes are possible. Please ask via email if you find a strange value!
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Alle Angaben ohne Garantie. Fehler beim Abschreiben sind möglich. Wenn Sie seltsame Werte entdecken, scheuen Sie sich nicht, per email nachzufragen!